stargazers
Ushakov Michaelgithub.com/EvilLord666updated 12 h ago

376 repositories starred since Mar 2016. Mostly learning resources and other things, and lately AI and language models.

Very Evil Guy

Charting stars376 / 376

Over time

Each line is a starred repository at the date it was starred. Height is its GitHub stars. Drag across the graph or pick a year to filter the list below.

Mar 2016: first stars, EasySockets, Plazmatrone2020–2021: 24 stars in 2 years2026: 154 stars, 54 in AI & LLMs201620182020202220242026
20162026
  • Mar 2016: first stars, EasySockets, Plazmatrone
  • 2020–2021: 24 stars in 2 years
  • 2026: 154 stars, 54 in AI & LLMs

Drift

Since Feb 2026, AI and language models went from 2% to 36% of new stars, while systems and graphics fell from 25% to 7%.

Learning & other 12%Systems & graphics 7%Libraries & tools 10%Infra & backend 10%Web & apps 16%ML & data 6%AI & LLMs 35%201620182020202220242026
20162026
  • Learning & other 12%
  • Systems & graphics 7%
  • Libraries & tools 10%
  • Infra & backend 10%
  • Web & apps 16%
  • ML & data 6%
  • AI & LLMs 35%

Terrain

Categories are regions. Where stars cluster, the ground rises. The most-starred repositories are marked like towns. Select a region to filter.

LANGUAGES & SYSTEMSAI & LLMSUNCATEGORISEDBACKEND & APISWEB FRONTENDMOBILE & DESKTOPMACHINE LEARNING & DATALIBRARIES & UTILITIESDATABASESDEVOPS & CLOUDLEARNING & LISTSTERMINAL & CLIDEVELOPER TOOLSSECURITYGAMES & GRAPHICSTESTINGSELF-HOSTEDMoneyPrinterTurboladybirdDocker-OSXacme.shgoogletestuppyplyrGoodbyeDPIPLFM_RADARABCDEFGH12345

Findings

  1. 2026 was the busiest year: 154 stars, 54 of them in AI & LLMs.

  2. They find things early: 78% of their stars have fewer than 1,000 stars on GitHub.

  3. 22 of their stars are archived or deprecated, and 2 name a successor. Another 104 have had no commits in two years.

  4. The longest pause was 6 months, from Apr 2025 to Sept 2025.

  5. C# accounts for 17% of their stars, Python for 14%.

Languages & systems

  1. 001123/lab-ipxe-os

    Multi-OS iPXE & Cloud-Init Hub - A high-performance, lightweight network autoinstall server for Bare-metal and Virtual Machines powered by Bun & TypeScript.

    TypeScriptv0.0.122026-10-07
    53
  2. sleep3r/mtproto.zig

    Keep the people you love connected — a tiny self-hosted Telegram proxy that hides in plain HTTPS

    Zigv1.15.42026-09-02
    2.2K
  3. Thamidu-Nadun/tinyWebC

    A simple web server in C, It can server files, mime type and other general web server functionalities

    C2026-07-04
    28
  4. OpenCoreLabsX/axi-qspi-controller

    AXI-based Quad SPI flash controller for SoC and embedded system integration.

    SystemVerilog2026-07-02
    18
  5. utkuhalis/ARM-Hobby-Operating-System

    A minimal hobby AArch64 kernel for QEMU virt and Raspberry Pi 5

    Cv0.1.02026-06-01
    15
  6. AjaySoniDev/VXN-RAMNet

    GPS-free visual route memory research system that learns routes from video frames, builds backtracking branch graphs with EfficientNetB0 embeddings, and classifies query routes using similarity evidence.

    Jupyter Notebookv0.1.0-research-prototype2026-05-19
    37
  7. Mistium/Origin-OS

    originOS is a scratch desktop gui made by @Mistium

    HTMLOSL_Packager2026-04-27
    137
  8. 640-KB/GLaDISK

    A high density floppy disk PC BIOS ROM for XT, AT, 286, 386+ systems, supporting many vintage and modern controllers.

    Assembly2026-04-15
    23
  9. igmunv/kosmos

    Небольшая 32-битная операционная система, написанная на C + ASM

    C2026-03-19
    121
  10. sergev/bkunix

    Unix V6 operating system for Soviet personal computer BK-0010/0011M

    C2026-02-08
    95
  11. Evensgn/RISC-V-CPU

    RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.

    Verilog2025-03-23
    394
  12. WangXuan95/FPGA-DDR-SDRAM

    An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。

    Verilog2025-02-25
    224
  13. ultraembedded/core_ddr3_controller

    A DDR3 memory controller in Verilog for various FPGAs

    Verilog2025-02-20
    649
  14. ultraembedded/biriscv

    32-bit Superscalar RISC-V CPU

    Verilog2024-12-09
    1.3K
  15. riscv-mcu/e203_hbirdv2

    The Ultra-Low Power RISC-V Core

    Verilog2024-12-05
    2K
  16. jhshi/openofdm

    Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

    Verilog2024-11-25
    484
  17. Wissance/FpgaNetHXDP

    A net firewall based on hXDP

    VHDL2024-10-07
    2
  18. aolofsson/oh

    Verilog library for ASIC and FPGA designers

    ArchivedVerilog2024-10-04
    1.4K
  19. riscv-tests-intro/riscv-tests-intro

    Открытый ознакомительный курс "Введение в функциональную верификацию RISC-V ядер"

    SystemVerilog2024-08-26
    55
  20. corundum/corundum

    Open source FPGA-based NIC and platform for in-network compute

    Verilog2024-07-17
    2.5K
  21. AngeloJacobo/UberDDR3

    Opensource DDR3 Controller

    Verilog2024-06-03
    497
  22. s8sg/goflow

    A Golang based high performance, scalable and distributed workflow framework

    CSSv0.1.42024-05-02
    1.4K
  23. alexforencich/verilog-ethernet

    Verilog Ethernet components for FPGA implementation

    Deprecatedfpganinja/taxiVerilog2024-03-21
    3.1K
  24. alexforencich/verilog-pcie

    Verilog PCI express components

    Verilog2024-03-14
    1.7K
  25. UzixLS/pc-kharon-386

    Tiny IBM PC compatible machine with 386 CPU, integrated VGA and sound.

    KiCad Layout2024-02-08
    114
  26. WangXuan95/FPGA-USB-Device

    An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-speed) device端控制器,可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备,只需要3个FPGA普通IO,而不需要额外的接口芯片。

    Verilog2024-02-05
    934
  27. ZipCPU/sdspi

    SD-Card controller, using either SPI, SDIO, or eMMC interfaces

    Verilog2024-01-25
    426
  28. WangXuan95/FPGA-SDcard-Reader

    An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器,可以从FAT16或FAT32格式的SD卡中读取文件。

    Verilog2024-01-19
    351
  29. MiSTle-Dev/MiSTeryNano

    Atari STE MiSTery core for the Tang Nano FPGAs

    Verilogv1.2.102024-01-19
    263
  30. projf/display_controller

    FPGA display controller with support for VGA, DVI, and HDMI.

    Verilog2023-09-19
    271
  31. Wissance/QmtechCycloneIVBoardDemos

    A set of additional non-official demo projects for Cyclone4 (EP4CE15F23C8) core boards

    Verilogv1.22023-06-27
    3
  32. stffrdhrn/sdram-controller

    Verilog SDRAM memory controller

    Verilog2023-06-08
    391
  33. myriadrf/LimeSDR-USB

    USB 3.0 version of the LimeSDR board

    ANTLR2023-05-21
    412
  34. Community-PIO-CH32V/platform-ch32v

    PlatformIO platform for CH32V RISC-V chips (CH32V003, CH32V103, CH32V20x, CH32V30x, CH32X035) and CH56x, CH57x, CH58x, CH59x

    Python2023-05-16
    414
  35. catkira/open5G_phy

    A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog

    ArchivedJupyter Notebook2023-05-02
    235
  36. openpnp/openpnp

    Open Source SMT Pick and Place Hardware and Software

    Java2.62023-04-19
    2.3K
  37. xjtuecho/EBAZ4205

    A 5$ Xilinx ZYNQ development board.

    Tcl2023-03-21
    810
  38. Wissance/QuickRS232

    A versatile full-duplex RS232 FPGA module with internal FIFO buffer on RX

    Verilogv1.12023-03-20
    3
  39. drowe67/pirip

    Minimal Hardware IP over VHF/UHF Radio using RpiTx and RTLSDR

    C++2022-11-21
    73
  40. Wissance/Sm2201

    Implementation of Sm2201 Hardware on semi-modern electronics

    Verilogv0.9.22022-11-03
    2
  41. RickStrahl/Westwind.Scripting

    Dynamically compile and execute C# Code and Expressions at runtime. Also includes a light weight script templating engine using Handlebar style C# syntax.

    C#2022-06-01
    255
  42. skiselev/radio-86rk

    Re-make of the Soviet Ham Radio computer published in Radio Magazine in 1986

    Assemblyv1.32022-02-26
    131
  43. Wissance/stringFormatter

    A set of tools to manipulate text, i.e. making text from templates in C#/Python way is faster than fmt.Sprintf

    Gov1.6.32021-12-09
    143
  44. SpinalHDL/VexRiscv

    A FPGA friendly 32 bit RISC-V CPU implementation

    Assembly2021-08-23
    3.3K
  45. MossbauerLab/RomChipReader

    A tool for manual read memory written in IP3604 (К556РТ5) and IP3601 (К556РТ4) using RZ EazyFPGA board

    Verilog2021-06-24
    3
  46. Wissance/gwuu

    Go web development extension over gorilla/mux and gorm

    Gov1.5.12021-03-12
    6
  47. ExperimentalPhysics/FpgaCourse

    Курс по программированию ПЛИС с примерами

    Verilog2019-09-13
    1
  48. mono/mono

    Mono open source ECMA CLI, C# and .NET implementation.

    C#2019-08-22
    11.5K
  49. MaterialDesignInXAML/MaterialDesignInXamlToolkit

    Google's Material Design in XAML & WPF, for C# & VB.Net.

    C#v5.4.02019-04-24
    16.3K
  50. ExperimentalPhysics/StepMotorDriver

    FPGA driver of step motor on CIC-560 training system designing for plazmatrone sample 1-d positioning

    SystemVerilog2019-01-07
    2

Is this you, @EvilLord666?

This page is built from public GitHub data. Sign in with GitHub to claim it: pin repositories, write a headline, get a weekly digest of releases and archived repos, connect your coding agent, or hide the page entirely.

Claim with GitHub